Comparing
260522.expires-ttl-once
(d9b5feb
) withmaster
(f4c7bae
)+14%
- Improvement
- 1
- Untouched
- 13
- New
- 2
Benchmarks
16 total
UnboundCache insert
benches/cache_benches.rs::benches::bench_cache_misses_and_inserts::Cache Misses & Inserts+14%
468.6 ns410.3 ns
ExpiringCache hit (O(1))
benches/cache_benches.rs::benches::bench_cache_hits::Cache Hits (O(1) Reads)N/A
N/A402.8 ns
ExpiringCache insert
benches/cache_benches.rs::benches::bench_cache_misses_and_inserts::Cache Misses & InsertsN/A
N/A437.5 ns
TtlSortedCache hit
benches/cache_benches.rs::benches::bench_cache_hits::Cache Hits (O(1) Reads)+9%
1,011.7 ns926.4 ns
LruCache insert (no eviction)
benches/cache_benches.rs::benches::bench_cache_misses_and_inserts::Cache Misses & Inserts+7%
853.3 ns795 ns
LruTtlCache eviction overhead
benches/cache_benches.rs::benches::bench_eviction_overhead::Eviction & Capacity Limits+2%
1.7 µs1.6 µs
LruCache hit
benches/cache_benches.rs::benches::bench_cache_hits::Cache Hits (O(1) Reads)0%
555.3 ns555.3 ns
LruTtlCache hit (O(1))
benches/cache_benches.rs::benches::bench_cache_hits::Cache Hits (O(1) Reads)0%
1.1 µs1.1 µs
UnboundCache hit
benches/cache_benches.rs::benches::bench_cache_hits::Cache Hits (O(1) Reads)0%
247.2 ns247.2 ns
ExpiringLruCache hit (O(1))
benches/cache_benches.rs::benches::bench_cache_hits::Cache Hits (O(1) Reads)0%
555.3 ns555.3 ns
TtlCache hit (O(1))
benches/cache_benches.rs::benches::bench_cache_hits::Cache Hits (O(1) Reads)0%
966.1 ns966.1 ns
RwLock UnboundCache unsync read
benches/cache_benches.rs::benches::bench_lock_synchronization::Lock Contention & Synchronization0%
372.8 ns372.8 ns
RwLock UnboundCache write lock read
benches/cache_benches.rs::benches::bench_lock_synchronization::Lock Contention & Synchronization0%
370.3 ns370.3 ns
LruCache eviction overhead
benches/cache_benches.rs::benches::bench_eviction_overhead::Eviction & Capacity Limits-3%
1.1 µs1.2 µs
TtlCache insert (no eviction)
benches/cache_benches.rs::benches::bench_cache_misses_and_inserts::Cache Misses & Inserts-3%
839.7 ns868.9 ns
LruTtlCache insert (no eviction)
benches/cache_benches.rs::benches::bench_cache_misses_and_inserts::Cache Misses & Inserts-5%
1.2 µs1.3 µs
Commits
Click on a commit to change the comparison rangeBase
master
f4c7bae
+14.22%
feat: add ExpiringCache, ExpiringLruCache, and expires = true macro attribute
d9b5feb
12 days ago
by jaemk